Technical Field
The present disclosure relates to the field of testing and characterization of signal propagation delay of logic cells. The present disclosure relates more particularly to the field of testing and characterization of the propagation delay of both rising edge signals and falling edge signals in logic cells.
Description of the Related Art
Digital integrated circuits typically include many different kinds of logic cells. Types of logic cells include OR gates, AND gates, NOR gates, NAND gates, inverters, buffers, and many other kinds of logic cells. Digital integrated circuits can include millions or even billions of transistors connected together in a complex organization to form the various circuits of the digital integrated circuit.
Logic cells commonly receive a signal on one or more inputs and output a signal in accordance with the inputs. For each kind of logic cell there is some delay from the time it takes after receiving an input signal to outputting the signal. For instance, if the output of an OR gate is low, after the OR gate receives a high signal on one of its inputs there is some delay before the output of the OR gate goes high. Likewise, if the output of the OR gate is high, after the OR gate receives low signals on all of its inputs there is some delay before the output of the OR gate goes low.
In order to properly design a digital integrated circuit, it is beneficial to know as nearly as possible the signal propagation delay of each kind of logic cell. Knowing the signal propagation delay caused by each kind of logic cell enables circuit designers to design more powerful and well-timed circuits.
Silicon qualification of logic cells is a vital element in the overall Q  silicon qualification of a technology platform. The signal propagation delay is an important parameter of a logic cell. Many methods have been used to measure the delay of logic cells in silicon. One such way is to make a ring oscillator that includes one or more logic cells in the oscillation path and to measure the frequency of the ring oscillator. The frequency of the ring oscillator gives an indication of the average of the rise and fall delay of all logic cells. In other words, there is a first kind of delay when the rising edge of the signal is received at the inputs of the logic cell. There is a second kind of delay when a falling edge of the logic signal is received at the inputs of the logic signal. Prior ring oscillator methods for measuring the delay of logic cells have only provided an average of both the rise and fall delay of the logic cells.
As integrated circuit technology becomes more complex and the structures in the integrated circuit become smaller and more densely arranged, it is becoming increasingly more beneficial to know both the rising and the falling delays of a logic cell in order to more nearly correlate CAD designs with the actual circuits implemented in the integrated circuit die.